3PA1030 Datasheet | 3PEAK

Features Description - CMOS 10-Bit, 50-MSPS Sampling A/D Converter - Configurable Input: Single-Ended or Differential - Differential Nonlinearity: 0.3 LSB - Three State Outputs - Out-of-Range Indicator - Built-in Clamp Function (DC Restore) - Adjustable on-Chip Voltage Reference - IF under Sampling to 135 MHz - Power Dissipation: 84 m W (3-V Supply) - Power down (Sleep) Mode: 10 μW - Operation between +2.7-V and +5.5-V Supply - Green, TSSOP28 Package - Pin patible with THS1030, AD9200, and AD876 Family Highlights - Low Power: The 3PA1030 speed is 50 MSPS but only consumes 84 m W on a 3-V supply. In sleep mode, power is reduced to 10 μW. - Pin patible with THS1030/TLC876/AD9200/ AD876: The 3PA1030 allows older designs to migrate to higher speed and lower supply voltages. - 100-MHz On-Board Sample-and-Hold: The versatile SHA input can be configured for either single-ended or differential inputs. - Out-of-Range Indicator: The OTR output bit indicates when the input signal is beyond the 3PA1030's input range. - Built-in Clamp Function: Allows DC restoration of video signals. The 3PA1030 is a monolithic, single-supply, 10-Bit, 50MSPS analog-to-digital converter with an on-chip sampleand-hold amplifier and voltage reference. The 3PA1030 uses a multi-stage differential pipeline architecture at 50MSPS data rates and guarantees no missing codes over the full operating temperature range. The input of the 3PA1030 has been designed to ease the development of both imaging and munications systems. Users can select a variety of input ranges and offsets and can drive the input either single-ended or differentially. The sample-and-hold (SHA) amplifier is equally suited for both multiplexed systems that switch full-scale voltage levels in successive channels and sampling single-channel inputs at frequencies up to and beyond the Nyquist rate. AC-coupled input signals can be shifted to a predetermined level, with an on-board 3PEAK proprietary clamp circuit. The dynamic performance is...