3PD5651E Datasheet | 3PEAK

Features - 125-MSPS Update Rate - 10-bit Resolution - Differential Current Outputs: 2 m A to 20 m A - SFDR at 100-MHz Clock with 1-MHz Output: 64 d Bc - Fast Settling: 35-ns Full-Scale Settling to 0.1% - On-Chip 1.10-V Reference - Edge-Triggered Latches - Power Dissipation: 115 m W @ 5 V - Single +5-V or +3-V Supply Operation - Green, TSSOP28 Package Applications - munications Transmit Channel - Signal Reconstruction - Direct Digital Synthesis (DDS) - Instrumentation - Video Reconstruction Highlights - Manufactured on a CMOS process, the 3PD5651E uses a proprietary switching technique that enhances dynamic performance well beyond 8- and 10-bit video DACs. - The on-chip, edge-triggered input CMOS latches readily interface to +3-V and +5-V CMOS logic families. The 3PD5651E can support update rates up to 125 MSPS. - A flexible single-supply operating range of +2.7 V to +5.5 V and a wide full-scale current adjustment span of 2 m A to 20 m A allows the 3PD5651E to operate at reduced power levels (i.e., 45 m W) without any degradation in dynamic performance. - A temperature pensated, 1.10-V bandgap reference is included on-chip providing a plete DAC solution. An external reference may be used. - The current output(s) of the 3PD5651E can easily be configured for various single-ended or differential applications. Description The 3PD5651E offers exceptional AC and DC performance while supporting update rates up to 125 MSPS. The flexible single-supply operating range from +2.7 V to +5.5 V and the low power dissipation of the 3PD5651E are well suited for portable and low power applications. Its power dissipation can be further reduced to 45 m W, without a significant degradation in performance, by lowering the full-scale current output. In addition, a power-down mode reduces the standby power dissipation to approximately 20 m W. The 3PD5651E is manufactured on an advanced CMOS process. A segmented current source architecture is bined with a proprietary switching technique to reduce...