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VDD7616A4A Datasheet Double Data Rate Sdram

Manufacturer: A-Data

Overview: V-Data Revision History Revision 1 ( Dec. 2001 ) 1.Fister release. VDD7616A4A Revision 2 ( Apr. 2002 ) 1. Changed module current specification. 2. Add Performance range. 3. Changed AC Characteristics. 4. Changed typo size on module PCB in package dimensions.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

The VDD7616A4A are four-bank Double Data Rate(DDR) Synchronous DRAMs organized as 2,097,152 words x 16 bits x 4 banks.

Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle.

Data outputs occur at both rising edges of CK and /CK.

Key Features

  • 2.5V for VDDQ power supply.
  • SSTL_2 interface.
  • MRS Cycle with address key programs -CAS Latency (2, 2.5) -Burst Length (2,4 &8) -Burst Type (sequential & Interleave).
  • 4 banks operation.
  • Differential clock input (CK, /CK) operation.
  • Double data rate interface.
  • Auto & Self refresh.
  • 4096 refresh cycle.
  • DQM for masking.
  • Package:66-pins 400 mil TSOP-Type II Ordering Information. Part No. VDD7616A4A-75BA VDD7616A4A-75B Fr.

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