A96G181 Overview
................................................................................................................................... 10 1.1 Device overview .................................................................................................................. 10 1.2 A96G181 block diagram .....................................................................................................
A96G181 Key Features
- 8-bit CISC M8051 core (8051 patible, 2 clocks per cycle)
- Endurance : 30,000 times
- In-System Programming (ISP)
- Retention : 10 years
- Normal I/O : 8 ports ( P0[3:0], P1[7:6], P2[1:0] )
- Basic Interval Timer (BIT) 8-bit × 1-ch
- Watch Dog Timer (WDT) 8-bit × 1-ch
- 8-bit × 1-ch (T0)
- 16-bit × 2-ch (T1/T2)
- 16-bit Pulse generation (by T1/T2)