ACCUTEK AK491024S
the AK491024 is identical to nine 1 Meg x 1 DRAMs. For the lower eight bits data input is tied to the data output and brought out separately for each device, with common RAS, CAS control. This common I/O feature dictates the use of early-write cycles to prevent contention of D and Q.| Part No. | AK491024S |
|---|---|
| Datasheet | AK491024S Download |
| Manufacturer | ACCUTEK |
| Description | 1048576 Word x 9 Bit CMOS Dynamic Random Access Memory |
| Buy | Stock & Price |
DESCRIPTION
The Accutek AK491024 high density memory module is a random access memory organized in 1 Meg x 9 bit words. The assembly consists of nine standard 1 Meg x 1 DRAMs in plastic leaded chip carriers (SOJ) mounted on the front side of a printed circuit board. The module can be configured as a leadless 30 pad SIM or a leaded 30 pin SIP. This packaging approach provides a 6 to 1 density increase over standard DIP packaging. The operation of Since the Write-Enable (WE) signal must always go low before CAS in a write cycle, Read-Write and Read-Modify-Write operation is not possible. For the ninth bit, the data input (D9) and the data output (Q9) pins are brought out separately and controlled by a separate PCAS for that bit. Bit nine is generally used for parity. ACCUTEK AK491024S / AK491024G 1,048,576 Word x 9 Bit CMOS Dynamic Random Access Memory Front View 30-Pin SIM 1 30 30-Pin SIP 1FEATURES
● 1,048,576 x 9 bit organization● Optional 30 Pad leadless SIM (Single In-Line Module)...
