AK5434D Overview
Power down） ADC output data MSB Straight binary code ADC output data ADC output data ADC output data ADC output data ADC output data ADC output data ADC output data ADC output data ADC output data ADC output data ADC output data ADC output data ADC output data LSB Sampling timing setting L: Sampling timing is determined by applying Logic to CHSEL-pin. The sampling timing is the timing of CHSEL=L.
AK5434D Key Features
- High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z
- Description
- Ch1/Ch2 select（L:Ch1, H:Ch2） PWR
- Analog Ground PWR
- Analog supply（3.0V～3.45V） I
- Ch1 differential input P side I
- Ch1 differential input N side O High-Z mon-mode voltage output Connect 1μF between AVSS and this pin. I
- Ch2 differential input N side I
- Ch2 differential input P side O L ADC Reference-voltage output. Connect 1μF between AVSS and this pin. I
- ADC clock input I