GENERAL DESCRIPTION
In case of 32kHz sampling, it can caluculate up to 511 steps. Parametric Equalizing can be done without external memory. FEATURES
[ DSP unit ] Word length: 24-bit (data RAM) Instruction cycle time: 54ns(maximum speed) Multiplier: 24 × 16 → 40-bit Divider: 16 ÷ 16 → 16-bit Program RAM: 384 × 32 bit External memory: DRAM,Pseudo-SRAM and SRAM can be connected (only use for delay data). Sampling frequency: 32kHz∼48kHz Automatic clear function of external RAM: 47msec after bringing RST high at fs=48kHz (include internal data RAM) Microcomputer interface: synchronized signal type 8-bit serial input 1 channel, synchronized signal type 24-bit serial output 1 channel Master clock: 512(511)/384(383)/256(255)fs The value inside ( ) is maximum calculation steps. 512fs mode is available when 32kHz sampling is chosen. Conversion of master/slave mode for LRCK and BCLK: When master mode is selected, the outputs of LRCK and BCLK depend on the set-up for input f...