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M1489/M1487: 486 PCI Chip Set
Features
M1489 (Cache-Memory PCI controller) M1487 (ISA Bus Controller)
Supported CPUs T Supports AMD 486D4 and X5, Intel 486, P24T, P24D,
DX4, SL-Enhanced, Cyrix M7, UMC U5 and AMD AM486DXL CPUs in 25, 33, 40, 50, 66, 100 and 133 MHz 3V/5V CPU interface
T Supports CPU L1 writeback T Supports Cyrix's linear addressing mode
L2 Cache Controller T Write Back cache with standard SRAM T 8 Tag Bits, always force Dirty or
7 Tag Bits, 1 Dirty bit
T Supports cache size of 128K to 1M with 32Kx8,
64Kx8, 128Kx8
T Supports 2-1-1-1 read burst timing T Write hit 0 wait support
DRAM Controller T Supports 5V/3V EDO DRAM T Flexible DRAM type & Timing support T Supports up to 128M bytes, 4-bank DRAM size T Supports hidden refresh and RAS only no
M1489 Datasheet
