AMCC S19233
the S19233 on the receive optical side is an adjustable filter (DispersionXXTM), offset cancellation circuitry to improve sensitivity, limiting amp with threshold Adjust, and a CDR with phase adjust. The low-jitter, 1-bit, CML interfaces guarantee compliance with the bit-error rate requirements of the Telcordia and ITU-T standards. The high speed serial input and output can be connected to the AMCC SerDes (S19235 or S19237) or others across 24 inches of standard FR4 with one connector.GENERAL FEATURES
● Complies with ITU-T specifications, 2.7 mUIrms max. jitter generation (50 KHz - 80 MHz)● Complies with XFP MSA Specifications
● 9.95 to 11.3 Gbps operation
● Optimized for up to 100 Km SMF
● Dual CDR - Typical Power 0.6 W
● Optical and Electrical Loopbacks
● Threshold & Phase Adjust
● CML serial input sensitivity at 10 mV pk-pk Differential
● Offset Cancellation Circuit
● RSSI - Receive Signal Strength Indicator
● LOS - Loss of Signal detect
● Termination and Biasing for AC coupling
● Power Down CDR Mode
● Reference clocks range 155 176 MHz
● Equalization on the Electrical Receive Side
● Lock detect indication
● -40 to 85 °C operation
● 1.8/3.3 Volt Power Supply
● I2C serial Interface Continued on next page...
DESCRIPTION
The S19233 10 GbE/FC/SONET/SDH/ FEC dual Clock Data Recovery (CDR) is one of the latest additions to the AMCC product family. S19233 device contains dual CDRs that provide fully integrated clock recovery signal conditioning capabilities for low power 10 Gbps applications.