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S19233 - 10 GbE/Fibre Channel/SONET/SDH/FEC Dual CDR

Description

The S19233 10 GbE/FC/SONET/SDH/ FEC dual Clock Data Recovery (CDR) is one of the latest additions to the AMCC product family.

S19233 device contains dual CDRs that provide fully integrated clock recovery signal conditioning capabilities for low power 10 Gbps applications.

Features

  • Complies with ITU-T specifications, 2.7 mUIrms max. jitter generation (50 KHz - 80 MHz).
  • Complies with XFP MSA Specifications.
  • 9.95 to 11.3 Gbps operation.
  • Optimized for up to 100 Km SMF.
  • Dual CDR - Typical Power 0.6 W.
  • Optical and Electrical Loopbacks.
  • Threshold & Phase Adjust.
  • CML serial input sensitivity at 10 mV pk-pk Differential.
  • Offset Cancellation Circuit.
  • RSSI - Receive Signal Strength Indicator.

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Datasheet preview – S19233

Datasheet Details

Part number S19233
Manufacturer AMCC
File Size 70.57 KB
Description 10 GbE/Fibre Channel/SONET/SDH/FEC Dual CDR
Datasheet download datasheet S19233 Datasheet
Additional preview pages of the S19233 datasheet.

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    Full PDF Text Transcription

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    S19233 10 GbE/Fibre Channel/SONET/SDH/FEC Dual CDR The system circuitry consists of a highspeed phase detector, clock dividers, and equalization circuitry. The device utilizes on-chip clock recovery/clock clean-up PLL components that allow the use of a slower external clock reference, 155.52 MHz (or equivalent FEC/10GbE/ 10 Gbps FC rates), in support of existing system clocking schemes. An equalizer is integrated in the receive front end of the TX side and it reshapes the data after transmission over a standard FR-4 material. This enables low bit error rate and transmission over longer distances. The device would allow users to meet the maximum dispersion penalty per ITU LR 2a, b, & c specifications with margin.
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