GENERAL DESCRIPTION
This device is designed to be programmed in-system with the standard system 5.0 volt V CC supply. A 12.0 volt VPP is not required for program or erase operations. The device can also be reprogrammed in standard EPROM programmers. The standard device offers access times of 55, 70, 9 0 , 1 2 0 , a n d 1 5 0 n s, a l l o w i n g o p e r a t i o n o f high-speed microprocessors without wait states. To eliminate bus contention the device has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls. The device requires only a single 5.0 volt power supply for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations. The device is entirely command set compatible with the JEDEC single-power-supply Flash standard. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine that controls the erase and programming circuitry.
AMD
