FEATURES
— 3-V core with 5-V-tolerant I/O — Binary compatible with all Am486® DX and Am486DX2 microprocessors — Wide range of support available through the AMD® FusionE86SM Program s IEEE 1149.1 JTAG Boundary-Scan Compatibility s Supports Environmental Protection Agency's Energy Star program — 3-V operation reduces power consumption up to 40% — Energy management capability provides an excellent base for energy-efficient design — Works with a variety of energy-efficient, powermanaged devices s 208-Lead SQFP or 168-Pin PGA Package GENERAL DESCRIPTION
The SMM function is implemented with an industry-standard, two-pin interface. w w w . t a d h s a t e e . u 4 m o c Publication ID 20037 Revision A Amendment /0 Issue Date April 1996 BLOCK DIAGRAM Power Plane Clock Interface 32-Bit Data Bus 32-Bit Data Bus 32-Bit Linear Address PCD, PWT VOLDET VCC, VSS Clock Generator CLK STPCLK Bus Interface Cache Unit 32 Address Drivers Write Buffers 4x32 Copyback Buffers 4x32 Writeback Buffers 4x32 Barrel...
AMD
