Am29F400AB Datasheet | AMD

feature for detection of program or erase cycle pletion s Ready/Busy output (RY/BY) - Hardware method for detection of program or erase cycle pletion s Erase Suspend/Resume - Supports reading data from a sector not being erased s Low power consumption - 20 m A typical active read current for Byte Mode - 28 m A typical active read current for Word Mode - 30 m A typical program/erase current s Enhanced power management for standby mode - 1 µA typical standby current s Boot Code Sector Architecture - T = Top sector - B = Bottom sector s Hardware RESET pin - Resets internal state machine to the read mode 5.0 V-only Flash GENERAL DESCRIPTION The Am29F400A is a 4 Mbit, 5.0 Volt-only Flash memory organized as 512 Kbytes of 8 bits each or 256 Kwords of 16 bits each. The 4 Mbits of data is divided into 11 sectors of one 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and seven 64 Kbytes, for flexible erase capability. The 8 bits of data will appear on DQ0- DQ7 or 16 bits on DQ0- DQ15. The Am29F400A is offered in 44-pin SO and 48-pin TSOP packages. This device is designed to be programmed in-system with the standard system 5.0 Volt VCC supply. 12.0 Volt VPP is not required for program or erase operations. The device can also be reprogrammed in standard EPROM programmers. The standard Am29F400A offers access times of 60 ns, 70 ns, 90 ns, 120 ns and 150 ns, allowing high speed microprocessors to operate without wait states. To eliminate bus contention the device has separate chip enable (CE), write enable (WE) and output enable (OE) controls. The Am29F400A is entirely mand set patible with the JEDEC single-power-supply Flash standard. mands are written to the mand register using standard microprocessor write timings. Register contents serve as input to an internal state-machine which controls the erase and programming circuitry. Publication# 20380 Rev: B Amendment/0 Issue Date: April 1997 This document...