AMD AmZ8148
The AmZ8148 Address Decoder combines a three-line to eightline decoder with four qualifying enable inputs (two active HIGH and two active LOW) and the acknowledge output required for "ready" or "wait state" control of all popular MOS microprocessors. The acknowledge output, ACK, is active LOW and responds to the combination of all enables and an acknowledge active, input command. The eight chip select outputs are individually active LOW in response to the combination of all enables active and the corresponding 3-bit input code at the S inputs.DESCRIPTION
The AmZ8148 is intended for chip select decoding in small, medium or large systems where multiple chip selects must be generated and address space must be allocated conservatively. LOGIC DIAGRAM So 1:~ ENABLE ------1 INPUTS E3 E4 CONNECTION DIAGRAM Top View Y1 LOGIC SYMBOL BLI-045 Note: Pin 1 is marked for orientation. BLI-046 8-36 AmZ8148 Ao A1 Vo V1 V2 V3 V4 Vs V6 V7 BLI-047 AmZ8148ELECTRICAL CHARACTERISTICS
The Following Conditions Apply Unless Otherwise Specified: COM'L TA = O°C to +70°C Vee = 5.0V ±5% (MIN. = 4.75V MIL TA = -55°C to +125°C Vee = 5.0V ±10% (MIN. = 4.50V MAX. = 5.25V) MAX. = 5.50V) DC CHARACTERISTICS OVER OPERATING RANGE ParametersDESCRIPTION
Test Conditions (Note 1) Typ. Min. (Note 2) Max. Units VOH Output HIGH Voltage VOL Output LOW Voltage Vee = MIN. VIN = VIH or VIL Vee = MIN. VIN = VIH or VIL IOH = - 44OILA IOL = 4.0mA IOL = 8.0mA 2.4 3.4 Volts 0.4 Volts 0.45 VIH Input HIGH Level VIL Input LOW Level VI Input Clamp Voltage Guaranteed input logical...