AMIS-50050 Datasheet | AMI SEMICONDUCTOR

Features - - - - - - - - - - - - - - - - - Low power with user controlled ‘shutdown’ modes 3.3V (+/-10 percent) Narrow band and spread spectrum operation, independently selectable for transmit and receive Performs all baseband functions required for implementation of direct sequence spread spectrum and can be used in any radio frequency band User programmable transmission protocol with pass through or packetization formatting Generic microprocessor interface Full or half duplex operation High process gain (up to 2047chips/bit) with data rates from 100bps to 4Mbps Independent transmit and receive PN code generators Gold code and 11 -chip Barker code options Programmable preamble lengths for faster acquisition when there has been recent transmission or reception Byte-wide transmit and receive FIFOs 16 or 32 bit CRC error checking 8 or 16 bit receiver addressing Optional data scrambling Support for: binary phase shift keying (BPSK); differential binary phase shift keying (DBPSK); quadrature phase shift keying (QPSK); differential quadrature phase shift keying (DQPSK) Continuous tracking feature for transferring multiple packets of data at high data rates without reacquiring synchronized packet .. The AMIS-50050 is a low power device optimal for portable battery powered applications. It utilizes a 3.3V power supply and interfaces to a 3V microprocessor and logic. The AMIS-50050 IC consists of a microprocessor interface and a full duplex transmit/receive message processor circuit. Included in the AMIS-50050 message transmit processor circuits are the data scrambler, packet generator, CRC generator, pseudonoise (PN) code generator, and modulation mode formatter. The AMIS-50050 message processor receive circuits include the receive PN code generator, receive synchronization and tau-dither tracking loop, integrate and dump control, data descrambler, packet decoder, CRC checker, demodulator, and signal strength indicator. Each transmit and receive PN code generator...