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Core Logic
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$0,+* PLFURQ &026 *DWH $UUD
Description AA2x is a family of 2-input gates which perform the logical AND function.
Logic Symbol
Truth Table
AA2x
A Q
B
A Q
B
A BQ L LL L HL H LL H HH
HDL Syntax Verilog .................... AA2x inst_name (Q, A, B); VHDL...................... inst_name: AA2x port map (Q, A, B);
Pin Loading
Pin Name A B
AA21 1.0 1.0
Equivalent Loads
AA22
AA24
1.0 2.1
1.0 2.1
AA26 2.1 2.1
Size And Power Characteristics
Power Characteristicsa
Cell Equivalent Gates
Static IDD (TJ = 85°C) (nA)
EQLpd (Eq-load)
AA21 AA22
2.0 2.0
TBD TBD
2.8 3.9
AA24 AA26
4.0 5.0
TBD TBD
7.0 10.5
a. See page 2-15 for power equation.
3-1
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$0,+* PLFURQ &026 *DWH $UUD
Propagation Delays (ns)
Conditions: TJ = 25°C, VDD = 5.
AA21 Datasheet
