ANA4 - CMOS Gate Array

This page provides the datasheet information for the ANA4, a member of the ANA2 CMOS Gate Array family.

Description

ANAx is a family of AND-NOR circuits consisting of two 3-input AND gates into a 3-input NOR gate.

AMI

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Datasheet Details

Part number	ANA4
Manufacturer	AMI
File Size	24.90 KB
Description	CMOS Gate Array
Datasheet	ANA4 Datasheet
Additional preview pages of the ANA4 datasheet.

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Full PDF Text Transcription

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$1$[ ® $0,+* PLFURQ &026 *DWH $UUD Description ANAx is a family of AND-NOR circuits consisting of two 3-input AND gates into a 3-input NOR gate. Logic Symbol Truth Table A B ANAx A BCDE FGQ C HHHXXXX L D E Q XXXHHHX L F XXXXXXHL All other combinations H G Core Logic HDL Syntax Verilog .................... ANAx inst_name (Q, A, B, C, D, E, F, G); VHDL...................... inst_name: ANAx port map (Q, A, B, C, D, E, F, G); Pin Loading Pin Name A B C D E F G ANA2 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Equivalent Loads ANA4 1.0 1.0 1.0 1.0 1.0 1.0 1.0 ANA6 2.1 2.1 2.1 2.1 2.1 2.1 2.1 Size And Power Characteristics Power Characteristicsa Cell Equivalent Gates Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) ANA2 6.0 TBD 11.2 ANA4 7.0 TBD 12.3 ANA6 12.0 TBD 21.1 a.

Published: Mar 12, 2018 |