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AU12 - CMOS Gate Array

Download the AU12 datasheet PDF. This datasheet also covers the AU11 variant, as both devices belong to the same cmos gate array family and are provided as variant models within a single manufacturer datasheet.

General Description

AU1x is a family of combinational one-bit full adders.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (AU11-AMI.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number AU12
Manufacturer AMI
File Size 33.46 KB
Description CMOS Gate Array
Datasheet download datasheet AU12 Datasheet

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Part Number Description
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Core Logic $8[ ® $0,+*  PLFURQ &026 *DWH $UUD Description AU1x is a family of combinational one-bit full adders. Logic Symbol AU1x CI CO A S B Truth Table CI A B S CO LLLLL L LHHL LHLHL L HH L H HL LHL HLHLH HHL LH HHHHH HDL Syntax Verilog .................... AU1x inst_name (CO, S, A, B, CI); VHDL...................... inst_name: AU1x port map (CO, S, A, B, CI); Pin Loading Pin Name A B CI Equivalent Loads AU11 AU12 4.2 8.6 4.2 8.5 3.2 6.5 Size And Power Characteristics Power Characteristicsa Cell Equivalent Gates Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) AU11 7.0 TBD 12.5 AU12 15.0 TBD 26.5 a. See page 2-15 for power equation. 3-37 Core Logic $8[ ® $0,+*  PLFURQ &026 *DWH $UUD Propagation Delays (ns) Conditions: TJ = 25°C, VDD = 5.