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BR04 - CMOS Gate Array

Download the BR04 datasheet PDF. This datasheet also covers the BR02 variant, as both devices belong to the same cmos gate array family and are provided as variant models within a single manufacturer datasheet.

General Description

BR0x is a family of non-inverting bus receivers with a single output to be used as the output of tristate busses.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (BR02-AMI.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number BR04
Manufacturer AMI
File Size 23.79 KB
Description CMOS Gate Array
Datasheet download datasheet BR04 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer

Other Datasheets by AMI

Part Number Description
BR02 CMOS Gate Array
BR06 CMOS Gate Array

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Core Logic %5[ ® $0,+*  PLFURQ &026 *DWH $UUD Description BR0x is a family of non-inverting bus receivers with a single output to be used as the output of tristate busses. Logic Symbol Truth Table BR0x AQ AQ AQ LL HH HDL Syntax Verilog .................... BR0x inst_name (Q, A); VHDL...................... inst_name: BR0x port map (Q, A); Pin Loading Pin Name A BR02 1.0 Equivalent Loads BR04 2.1 BR06 2.1 Size And Power Characteristics Power Characteristicsa Cell Equivalent Gates Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) BR02 2.0 TBD 3.8 BR04 3.0 TBD 7.6 BR06 4.0 TBD 10.8 a. See page 2-15 for power equation. 3-41 %5[ $0,+*  PLFURQ &026 *DWH $UUD Propagation Delays (ns) Conditions: TJ = 25°C, VDD = 5.