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DF4F2 - CMOS Gate Array

This page provides the datasheet information for the DF4F2, a member of the DF4F1 CMOS Gate Array family.

Description

DF4Fx is a family of static, master-slave, multiplexed scan D flip-flops without SET or RESET.

Outputs are buffered and change state on the rising edge of the clock.

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Datasheet Details

Part number DF4F2
Manufacturer AMI
File Size 39.11 KB
Description CMOS Gate Array
Datasheet download datasheet DF4F2 Datasheet
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Core Logic '))[ ® $0,+*  PLFURQ &026 *DWH $UUD Description DF4Fx is a family of static, master-slave, multiplexed scan D flip-flops without SET or RESET. Outputs are buffered and change state on the rising edge of the clock. Logic Symbol DF4Fx DQ C SD SE Q Truth Table C ↑ ↑ ↑ ↑ L D SD SE Q HX L H LXLL XHHH XLHL X X X NC NC = No Change QN L H L H NC HDL Syntax Verilog .................... DF4Fx inst_name (Q, QN, C, D, SD, SE); VHDL...................... inst_name: DF4Fx port map (Q, QN, C, D, SD, SE); Pin Loading Pin Name C D SD SE DF4F1 1.0 1.0 1.0 2.1 Equivalent Loads DF4F2 DF4F4 1.0 1.0 1.0 1.0 1.0 1.0 2.1 2.1 DF4F6 1.0 1.0 1.0 2.1 Size And Power Characteristics Power Characteristicsa Cell Equivalent Gates Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) DF4F1 9.
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