Datasheet4U Logo Datasheet4U.com

DL642 - CMOS Gate Array

This page provides the datasheet information for the DL642, a member of the DL641 CMOS Gate Array family.

Description

DL64x is a family of transparent, buffered D latches with active low gate transparency.

RESET is active low.

📥 Download Datasheet

Datasheet preview – DL642

Datasheet Details

Part number DL642
Manufacturer AMI
File Size 43.77 KB
Description CMOS Gate Array
Datasheet download datasheet DL642 Datasheet
Additional preview pages of the DL642 datasheet.

📁 Similar Datasheet

  • DL6023 - Temperature and humidity meter clock (JinFengDa)
  • DL60P - SMALL SIGNAL SCHOTTKY DIODES (Dc Components)
  • DL6158 - 10 Display Controller (JinFengDa)
  • DL6159 - LCD Module (JinFengDa)
  • DL6205 - DL6200 Series / Digital Delay Modules (Datatronics)
  • DL6206 - DL6200 Series / Digital Delay Modules (Datatronics)
  • DL6207 - DL6200 Series / Digital Delay Modules (Datatronics)
  • DL6208 - DL6200 Series / Digital Delay Modules (Datatronics)
  • DL6209 - DL6200 Series / Digital Delay Modules (Datatronics)
  • DL6210 - DL6200 Series / Digital Delay Modules (Datatronics)
Other Datasheets by AMI

Full PDF Text Transcription

Click to expand full text
Core Logic '/[ $0,+*  PLFURQ &026 *DWH $UUD Description DL64x is a family of transparent, buffered D latches with active low gate transparency. RESET is active low. Logic Symbol Truth Table DL64x DQ G Q R RN D GN Q QN HL L LH HH L H L H X H NC NC LXXLH NC = No Change HDL Syntax Verilog .................... DL64x inst_name (Q, QN, D, GN); VHDL...................... inst_name: DL64x port map (Q, QN, D, GN); Pin Loading Pin Name D GN RN DL641 1.0 1.0 1.0 Equivalent Loads DL642 DL644 1.0 1.0 1.0 1.0 1.0 1.0 DL646 1.0 1.0 1.0 Size And Power Characteristics Cell DL641 DL642 Equivalent Gates 5.0 7.0 Power Characteristicsa Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) TBD 11.3 TBD 13.4 DL644 DL646 11.0 14.0 TBD TBD 28.8 35.7 a. See page 2-15 for power equation.
Published: |