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DL654 - CMOS Gate Array

This page provides the datasheet information for the DL654, a member of the DL651 CMOS Gate Array family.

Description

DL65x is a family of transparent, buffered D latches with active low gate transparency.

SET is active low.

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Datasheet preview – DL654

Datasheet Details

Part number DL654
Manufacturer AMI
File Size 43.55 KB
Description CMOS Gate Array
Datasheet download datasheet DL654 Datasheet
Additional preview pages of the DL654 datasheet.

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Full PDF Text Transcription

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Core Logic '/[ $0,+*  PLFURQ &026 *DWH $UUD Description DL65x is a family of transparent, buffered D latches with active low gate transparency. SET is active low. Logic Symbol Truth Table DL65x DSQ G Q SN GN D Q QN L XXH L H H X NC NC HL L LH H L HH L NC = No Change HDL Syntax Verilog .................... DL65x inst_name (Q, QN, D, GN, SN); VHDL...................... inst_name: DL65x port map (Q, QN, D, GN, SN); Pin Loading Pin Name D GN SN DL651 1.0 1.0 1.0 Equivalent Loads DL652 DL654 1.0 1.0 1.0 1.0 1.0 1.0 DL656 1.0 1.0 1.0 Size And Power Characteristics Cell DL651 DL652 Equivalent Gates 6.0 7.0 Power Characteristicsa Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) TBD 12.6 TBD 15.7 DL654 DL656 10.0 12.0 TBD TBD 27.2 33.9 a.
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