FEATURES
2.0 DESCRIPTION
Dual phase-locked loop (PLL) device with three output clock frequencies 3.3V supply voltage Small circuit board footprint (8-pin 0.150″ SOIC) Custom frequency selections available - contact your local AMI Sales Representative for more information All frequencies are ratiometrically derived from the crystal oscillator frequency. Figure 1: Pin Configuration SEL XIN XOUT VDD 1 8 Table 1: Crystal / Output Frequencies CLKA CLKB VSS CLKC FS6284-01 1 5 DEVICE SEL 0 fXIN (MHz) CLKA (MHz) CLKB (MHz) CLKC (MHz) FS6284 2 3 4 7 6 14.31818 81.000 (fXIN* 198 / 35) 14.31818 48.000 (fXIN) (fXIN* 352 / 105) 70.000 (fXIN* 44 / 9) NOTE: Contact AMI for custom PLL frequencies 8-pin (0.150″) SOIC Figure 2: Block Diagram XIN CRYSTAL OSC. XOUT PLL DIVIDER ARRAY CLKA CLKB PLL SEL CLKC FS6284 This document contains information on a preproduction product. Specifications and information herein are subject to change without notice. ,62 3.28.00 )6 'XDO 3// &ORFN *HQHUDWRU ,& $GYDQFH ,QIRUP...
AMI
