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IDCR0 - CMOS Gate Array

General Description

IDCR0 is a non-buffered, resistive analog interface input piece with ESD protection.

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Datasheet Details

Part number IDCR0
Manufacturer AMI
File Size 16.68 KB
Description CMOS Gate Array
Datasheet download datasheet IDCR0 Datasheet

Full PDF Text Transcription for IDCR0 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for IDCR0. For precise diagrams, and layout, please refer to the original PDF.

,'&5 $0,+*  PLFURQ &026 *DWH $UUD Description IDCR0 is a non-buffered, resistive analog interface input piece with ESD protection. Logic Symbol Truth Table Pin Loadi...

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ce input piece with ESD protection. Logic Symbol Truth Table Pin Loading IDCR0 QC P PADM D PADM QC LL HH PADM Load 4.90 pF ® HDL Syntax Verilog .................... IDCR0 inst_name (QC, PADM); VHDL...................... inst_name: IDCR0 port map (QC, PADM); Power Characteristics Parameter Value Units Static IDD (TJ = 85°C) TBD nA EQLpd 2.1 Eq-load See page 2-15 for power equation. Note: This special purpose, “resistive input” pad is not intended for use as a general input pad.

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