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Core Logic
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Description NA3x is a family of 3-input gates which perform the logical NAND function.
Logic Symbol
Truth Table
NA3x
A B C
A B C
Q Q
A B CQ L XXH X L XH XXLH HHH L
HDL Syntax Verilog .................... NA3x inst_name (Q, A, B, C); VHDL...................... inst_name: NA3x port map (Q, A, B, C);
Pin Loading
Pin Name
A B C
NA31 1.0 1.0 1.0
NA32 2.1 2.1 2.1
Equivalent Loads NA33 2.1 2.1 2.1
NA34 2.1 2.1 2.1
Size And Power Characteristics
Power Characteristicsa
Cell Equivalent Gates
Static IDD (TJ = 85°C) (nA)
EQLpd (Eq-load)
NA31
2.0
TBD
1.6
NA32
3.0
TBD
2.7
NA33
6.0
TBD
8.3
NA34
6.0
TBD
13.3
NA36
8.0
TBD
16.0
a. See page 2-15 for power equation.
NA36 2.1 2.1 2.
NA31 Datasheet
