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ODCSXE16 - CMOS Gate Array

Download the ODCSXE16 datasheet PDF. This datasheet also covers the ODCSXE04 variant, as both devices belong to the same cmos gate array family and are provided as variant models within a single manufacturer datasheet.

General Description

ODCSXExx is a family of 4 to 16 mA, non-inverting, CMOS-level, tristate output buffer pieces with active low enables and controlled slew rate outputs.

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Note: The manufacturer provides a single datasheet file (ODCSXE04-AMI.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number ODCSXE16
Manufacturer AMI
File Size 25.25 KB
Description CMOS Gate Array
Datasheet download datasheet ODCSXE16 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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2'&6;([[ ® $0,+*  PLFURQ &026 *DWH $UUD Description ODCSXExx is a family of 4 to 16 mA, non-inverting, CMOS-level, tristate output buffer pieces with active low enables and controlled slew rate outputs. Logic Symbol Truth Table ODCSXExx EN SL A PADM EN A PADM LL L LH H HX Z HDL Syntax Verilog .................... ODCSXExx inst_name (PADM, A, EN); VHDL...................... inst_name: ODCSXExx port map (PADM, A, EN); Pin Loading Pin Name A (eq-load) EN (eq-load) PADM (pF) ODCSXE04 2.3 6.9 4.94 Power Characteristics Cell Output Drive (mA) ODCSXE04 4 ODCSXE08 8 ODCSXE12 12 ODCSXE16 16 a. See page 2-15 for power equation. ODCSXE08 2.3 6.9 4.94 Load ODCSXE12 2.3 6.9 4.94 ODCSXE16 2.3 6.9 4.