ODTXXX24 - CMOS Gate Array

This page provides the datasheet information for the ODTXXX24, a member of the ODTXXX01 CMOS Gate Array family.

Datasheet Summary

Description

ODTXXXxx is a family of 1 to 24 mA, non-inverting, TTL-level output buffer pieces.

AMI

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ODTXXX24 CMOS Gate Array by AMI - Datasheet Preview — Datasheet preview – ODTXXX24

Datasheet Details

Part number	ODTXXX24
Manufacturer	AMI
File Size	24.52 KB
Description	CMOS Gate Array
Datasheet	ODTXXX24 Datasheet
Additional preview pages of the ODTXXX24 datasheet.

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2'7;;;[[ ® $0,+* PLFURQ &026 *DWH $UUD Description ODTXXXxx is a family of 1 to 24 mA, non-inverting, TTL-level output buffer pieces. Logic Symbol Truth Table ODTXXXxx A PADM A PADM LL HH Pad Logic HDL Syntax Verilog .................... ODTXXXxx inst_name (PADM, A); VHDL...................... inst_name: ODTXXXxx port map (PADM, A); Pin Loading Pin Name A (eq-load) ODTXXX01 4.3 ODTXXX02 4.3 ODTXXX04 6.2 Load ODTXXX08 8.3 ODTXXX12 8.2 Power Characteristics Cell Output Drive (mA) ODTXXX01 1 ODTXXX02 2 ODTXXX04 4 ODTXXX08 8 ODTXXX12 12 ODTXXX16 16 ODTXXX24 24 a. See page 2-15 for power equation. Power Characteristicsa Static IDD (TJ = 85°C) (nA) TBD EQLpd (Eq-load) 149.5 TBD 155.0 TBD 165.6 TBD 189.8 TBD 210.7 TBD 234.8 TBD 248.

Published: Mar 13, 2018 |