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21 [
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$0,+* PLFURQ &026 *DWH $UUD
Description
ON9x is a family of OR-NAND circuits consisting of one 3-input OR gate and one 2-input OR gate into a 3-input NAND gate.
Logic Symbol
Truth Table
A
ON9x
A BCDE FQ
B L L LXXXH
C XXXL LXH
D Q XXXXXLH
E
All other combinations
L
F
Core Logic
HDL Syntax Verilog .................... ON9x inst_name (Q, A, B, C, D, E, F); VHDL...................... inst_name: ON9x port map (Q, A, B, C, D, E, F);
Pin Loading
Pin Name
A B C D E F
ON92 1.0 1.0 1.0 1.0 1.0 1.0
Equivalent Loads ON94 1.0 1.0 1.0 1.0 1.0 1.0
ON96 2.1 2.1 2.1 2.1 2.1 2.1
Size And Power Characteristics
Power Characteristicsa
Cell Equivalent Gates
Static IDD (TJ = 85°C) (nA)
EQLpd (Eq-load)
ON92
5.0
TBD
10.9
ON94
7.0
TBD
11.8
ON96
11.0
TBD
21.4
a.
ON92 Datasheet
