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Core Logic
25[
®
$0,+* PLFURQ &026 *DWH $UUD
Description OR2x is a family of 2-input gates which perform the logical OR function.
Logic Symbol
Truth Table
OR2x A
Q B
A Q
B
A BQ LLL LHH HLH HHH
HDL Syntax Verilog .................... OR2x inst_name (Q, A, B); VHDL...................... inst_name: OR2x port map (Q, A, B);
Pin Loading
Pin Name A B
OR21 1.0 1.0
Equivalent Loads
OR22
OR24
1.0 2.1
1.0 2.1
OR26 2.1 2.1
Size And Power Characteristics
Power Characteristicsa
Cell Equivalent Gates
Static IDD (TJ = 85°C) (nA)
EQLpd (Eq-load)
OR21 OR22
2.0 2.0
TBD TBD
2.6 3.6
OR24 OR26
4.0 5.0
TBD TBD
7.3 10.7
a. See page 2-15 for power equation.
3-211
25[
$0,+* PLFURQ &026 *DWH $UUD
Propagation Delays (ns)
Conditions: TJ = 25°C, VDD = 5.
OR21 Datasheet
