A26E001A
Description
Address Inputs SRAM Enable Write Enable Data Input/Outputs ROM Enable Output Enable Power Supply Ground WE D0 - D7 ROMCE ~ ~ A11 A9 A8 A13 A14 A17 RAMCE VCC WE A16 A15 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 ~ ~ A26E001AX 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE A10 ROMCE D7 D6 D5 D4 D3 GND D2 D1 D0 A0 A1 A2 A3 32 8 24 OE VCC GND (November, 1998, Version 21) 1 AMIC Technology, Inc.
Key Features
- It operates on a low power supply voltage from 1.8V to 3.3V, with two chip selects to enable the MASK ROM or SRAM independently
- Minimum standby power is drawn by this device when ROMCE and RAMCE are at a high level, independent of the other input levels
- Data retention is guaranteed at a power supply voltage as low as 1.6V
