FEATURES
JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks / Pulse RAS MRS cycle with address key programs - CAS Latency (2,3) - Burst Length (1,2,4,8 & full page) - Burst Type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock Deep Power Down Mode Burst Read Single-bit Write operation Clock Frequency (max) : 166MHz @ CL=3 (-6) 143MHz @ CL=3 (-7) 1M X 32 Bit X 4 Banks Synchronous DRAM DQM for masking Auto & self refresh 64ms refresh period (4K cycle) Self refresh with programmable refresh period through EMRS cycle Programmable Power Reduction Feature by partial array activation during Self-refresh through EMRS cycle 86 Pin TSOP (II) operating temperature range: 0ºC to + 70ºC GENERAL DESCRIPTION
Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable latencies allows the same device to be useful for a variety of high bandwidth, high performance memory system applications.
AMIC Technology
