A48P3616
Feature
CAS Latency and Frequency CAS Latency 2 2.5 3 Maximum Operating Frequency (MHz) DDR466 DDR400 DDR333 DDR266 (43) (5T) (6K) (75B) 133 100 166 166 133 233 200
- Differential clock inputs (CK and CK )
- Four internal banks for concurrent operation
- Data mask (DM) for write data.
- DLL aligns DQ and DQS transitions with CK transitions.
- mands entered on each positive CK edge; data and data mask referenced to both edges of DQS.
- Burst lengths: 2, 4, or 8
- CAS Latency: 2 & 2.5 for 6K/75B, 2.5 & 3 for 5T, 3 for 43
- Auto Precharge option for each burst access
- Auto Refresh and Self Refresh Modes
- 15.6µs Maximum Average Periodic Refresh Interval
- 2.5V (SSTL_2 patible) I/O
- VDD = VDDQ = 2.5V ± 0.2V (6K/75B)
- VDD = VDDQ = 2.6V ± 0.1V (5T/43)
- Lead-free and Halogen-free product available
8M X 16 Bit DDR DRAM
- Double data rate architecture: two data transfers per clock cycle.
- Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data...
