LP62P16128CV-12LLT Datasheet | AMIC Technology

LP62P16128C-T Series Preliminary Document Title 128K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 128K X 16 BIT LOW VOLTAGE CMOS SRAM History Initial issue Issue Date March 11, 2002 Remark Preliminary PRELIMINARY (March, 2002, Version 0.0) AMIC Technology, Inc. LP62P16128C-T Series Preliminary Features n Operating voltage: 2.3V to 2.7V n Access times: 120 ns (max.) n Current: Very low power version: Operating: 20mA (max.) Standby: 100µA (max.) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-patible n mon I/O using three-state output n Data retention voltage: 1.2V (min.) n Available in 44-pin TSOP and 48-ball...