LP62S1024A-I Description
The LP62S1024A-I is a low operating current 1,048,576bit static random access memory organized as 131,072 words by 8 bits and operates on a low power voltage: It is built using AMIC's high performance CMOS process. Inputs and three-state outputs are TTL patible and allow for direct interfacing with mon system bus structures.
LP62S1024A-I Key Features
- TSOP/TSSOP
- 4, 7, 10
- 20, 31 5 6 8 9 21
- 23, 25
- 29 24 30 32 Symbol A0
- A16 WE CE2 VCC NC I/O1
- I/O8 GND CE1 OE Description Address Inputs Write Enable Chip Enable Power Supply No Connection Data Input/Outputs Ground
- PRELIMINARY