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LP62S16128BU-55LLT - 128K X 16 BIT LOW VOLTAGE CMOS SRAM

General Description

The LP62S16128B-T is a low operating current 2,097,152-bit static random access memory organized as 131,072 words by 16 bits and operates on low power voltage from 2.7V to 3.6V.

It is built using AMIC's high performance CMOS process.

Key Features

  • n Operating voltage: 2.7V to 3.6V n Access times: 55/70 ns (max. ) n Current: Very low power version: Operating: 55ns 40mA (max. ) 70ns 35mA (max. ) Standby: 10µA (max. ) n n n n n Full static operation, no clock or refreshing required All inputs and outputs are directly TTL-compatible Common I/O using three-state output Data retention voltage: 2V (min. ) Available in 44-pin TSOP and 48-ball CSP (6 x 8 mm) packages General.

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Datasheet Details

Part number LP62S16128BU-55LLT
Manufacturer AMIC Technology
File Size 160.05 KB
Description 128K X 16 BIT LOW VOLTAGE CMOS SRAM
Datasheet download datasheet LP62S16128BU-55LLT Datasheet

Full PDF Text Transcription for LP62S16128BU-55LLT (Reference)

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LP62S16128B-T Series 128K X 16 BIT LOW VOLTAGE CMOS SRAM Features n Operating voltage: 2.7V to 3.6V n Access times: 55/70 ns (max.) n Current: Very low power version: Ope...

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n Access times: 55/70 ns (max.) n Current: Very low power version: Operating: 55ns 40mA (max.) 70ns 35mA (max.) Standby: 10µA (max.) n n n n n Full static operation, no clock or refreshing required All inputs and outputs are directly TTL-compatible Common I/O using three-state output Data retention voltage: 2V (min.) Available in 44-pin TSOP and 48-ball CSP (6 x 8 mm) packages General Description The LP62S16128B-T is a low operating current 2,097,152-bit static random access memory organized as 131,072 words by 16 bits and operates on low power voltage from 2.7V to 3.6V. It is built using AMIC's high performance CMOS proce

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