FEATURES
n Operating voltage: 2.7V to 3.6V n Access times: 55/70 ns (max.) n Current: Very low power version: Operating: 55ns 40mA (max.) 70ns 35mA (max.) Standby: 10µA (max.) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Data retention voltage: 2V (min.) n Available in 44-pin TSOP and 48-ball CSP (6 x 8 mm) packages 128K X 16 BIT LOW VOLTAGE CMOS SRAM GENERAL DESCRIPTION
Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Two byte enable inputs and an output enable input are included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2V. Product Family Product Family LP62S16128C Operating Temperature -25°C ~ +85°C VCC Range 2.7V~3.6V Power Dissipation Speed 55ns / 70ns Data Retention (ICCDR, Typ.) 0.2µA Standby (ISB1, Typ.) 0.5µA Operating (ICC2, Typ.) 5mA Package Type 44L TSOP 48B MBGA 1.