LP62S16256EU-55LLI Datasheet PDF

AMIC Technology LP62S16256EU-55LLI

The LP62S16256E-I is a low operating current 4,194,304-bit static random access memory organized as 262,144 words by 16 bits and operates on low power voltage from 2.7V to 3.3V. It is built using AMIC's high performance CMOS process. The chip enable input is provided for POWER-DOWN, device enable.

Part No.	LP62S16256EU-55LLI
Datasheet	LP62S16256EU-55LLI Download
Manufacturer	AMIC Technology
Description	256K X 16 BIT LOW VOLTAGE CMOS SRAM
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LP62S16256EU-55LLI datasheet page 1 preview

FEATURES

n Operating voltage: 2.7V to 3.6V n Access times: 55ns / 70ns (max.) n Current: Very low power version: Operating: 40mA (max.) Standby: 10µA (max.) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Data retention voltage: 2.0V (min.) n Available in 44-pin TSOP and 48-ball CSP (6 × 8mm) packages

GENERAL DESCRIPTION

Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Two byte enable inputs and an output enable input are included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2.0V. Product Family Product Family Operating Temperature -40°C ~ +85°C VCC Range 2.7V~3.6V Speed Power Dissipation Data Retention Standby Operating (ICCDR, Typ.) (ISB1, Typ.) (ICC2, Typ.) 0.08µA 0.3µA 5mA Package Type 44L TSOP 48B CSP LP62S16256E-I 55ns / 70ns 1. Typical values are measured at VCC = 3.0V, TA = 25°C and not 100% tested.