AP1280AGN3 Datasheet PDF | Advanced Power Electronics

Advanced Power Electronics AP1280AGN3

The AP1280AGN3 is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. The regulator is capable of actively sinking or sourcing up to 2A while regulating an output voltage to within 40mV. The output termination voltage cab be tightly regulated to track 1/2VDDQ by two external voltage divider resistors or the desired output voltage can be pro-grammed by externally forcing the REFEN pin voltage.

Part No.	AP1280AGN3
Datasheet	AP1280AGN3 Download
Manufacturer	Advanced Power Electronics
Description	2A SINK/SOURCE BUS TERMINATION REGULATOR
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FEATURES

Ideal for DDR-I, DDR-II and DDR-III VTT

APPLICATIONS

Sink and Source up to 2Amp Integrated Power MOSFETs Generates Termination Voltage for SSTL_2, SSTL_18, HSTL, SCSI-2 and SCSI-3 Interfaces. High Accuracy Output Voltage at Full-Load Output Adjustment by Two External Resistors Built-in Soft-start Function Shutdown for Suspend to RAM (STR) Functionality with High-Impedance Output Current Limiting Protection On-Chip Thermal Protection Available in DFN 3x3-8L Packages VIN and VCNTL Under Voltage Protection RoHS Compliant and 100% Lead (Pb)-Free AP1280AGN3 DESCRIPTIOON devices requirements. The AP1280AGN3 also incorporates a high-speed differential amplifier to provide ultra-fast response in line/load transient. Other features include extremely low initial offset voltage, excellent load regulation, current limiting in bi-directions and on-chip thermal shut-down protection.Built-in softstart function avoids a misoperation by inrush current. The AP1280AGN3 are available in the DFN 3x3-8L surface mount packages.