AT32F425
Overview
- Core: ARM® 32-bit Cortex®-M4 CPU - 96 MHz maximum frequency, with a memory protection unit (MPU) - Single-cycle multiplication and hardware division - DSP instructions
- Memories - 32 to 64 Kbytes of internal Flash memory - 4 Kbytes of boot memory used as a Bootloader or as a general instruction/data memory (one-time-configured) - sLib: configurable part of main Flash set as a library area with code executable but secured, non-readable - 20 Kbytes of SRAM
- Power control (PWC) - 2.4 to 3.6 V supply - Power on reset (POR), low voltage reset (LVR), and power voltage monitoring (PVM) - Low power modes: Sleep, Deepsleep, and Standby modes, 6 WKUP pins can wake up Standby mode - 5 x 32-bit battery powered registers (BPR)
- Clock and reset management (CRM) - 4 to 25 MHz crystal (HEXT) - Internal 48 MHz factory-trimmed HICK (±1 % at TA = 25 °C, ±2.5 % at TA = -40 to +105 °C), with automatic clock calibration (ACC) - PLL flexible multiplication and division factor - 32 kHz crystal (LEXT) - Low speed internal clock (LICK)
- Analog - 1 x 12-bit 2 MSPS A/D converter, up to 16 input channels, hardware over-sampling up to equivalent 16-bit resolution - Internal reference voltage (VINTRV)
- DMA - 1 x 7-channel DMA controller for flexible mapping support
- Up to 55 fast GPIOs - All mappable on 16 external interrupts (EXINT) - Almost all 5 V-tolerant
- Up to 13 timers (TMR) - 1 x 16-bit 7-channel advanced timer, three independent channels for complementary PWM output with dead-time generator and emergency brake - Up to 6 x 16-bit and 1 x 32-bit generalpurpose timers, each with 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input - Advanced and general-purpose timers provide up to 24-channel PWM - 2 x 16-bit basic timers -
