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AS4LC4M4883C Datasheet Edo Page Mode

Manufacturer: ASI

Overview: www.DataSheet4U.com AUSTIN SEMICONDUCTOR, INC. AS4LC4M4 883C 4 MEG x 4 DRAM DRAM AVAILABLE IN MILITARY SPECIFICATIONS • MIL-STD-883 • SMD Planned 4 MEG x 4 DRAM 3.

Datasheet Details

Part number AS4LC4M4883C
Manufacturer ASI
File Size 213.74 KB
Description EDO PAGE MODE
Datasheet AS4LC4M4883C_ASI.pdf

General Description

The AS4LC4M4 is a randomly accessed solid-state memory containing 16,777,216 bits organized in a x4 configuration.

The AS4LC4M4 ?R?A/S is used to latch the first 11 bits and ?C?A/S the latter 11 bits.

READ and WRITE cycles are selected with the ?

Key Features

  • Industry-standard x4 pinout, timing, functions and packages.
  • High-performance CMOS silicon-gate process.
  • Single +3.3V ± 0.3V power supply.
  • Low power, 1mW standby; 150mW active, typical.
  • All inputs, outputs and clocks are TTL-compatible.
  • Refresh modes: ?R?A/S ONLY, ?C?A/S-BEFORE-?R?A/S (CBR) HIDDEN.
  • 2,048-cycle (11 row-, 11 column-addresses).
  • Extended Data-Out (EDO) PAGE access cycle.
  • 5V-tolerant I/Os (5.5V maximum.

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