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MT5C1005 Datasheet PDF

ASI MT5C1005

The Austin Semiconductor SRAM family employs high-speed, low power CMOS designs fabricated using doublelayer metal, double-layer polysilicon technology. For flexibility in high-speed memory applications, ASI offers chip enable (CE\) and output enable (OE\) capability.
Part No. MT5C1005
Datasheet MT5C1005 Download
Manufacturer
ASI
Description SRAM MEMORY ARRAY
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MT5C1005 datasheet page 1 preview

FEATURES

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● High Speed: 20, 25, 35, and 45 Battery Backup: 2V data retention Low power standby High-performance, low-power CMOS double-metal process
● Single +5V (+10%) Power Supply
● Easy memory expansion with CE\ and OE\ options.
● All inputs and outputs are TTL compatible A7 A8 A9 A12 A10 A11 A13 NC A14 A15 A16 A17 NC CE\ OE\ Vss 32-Pin Flat Pack (F) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 Vcc A6 A5 A2 A4 A3 A1 NC NC A0 NC DQ4 DQ3 DQ2 DQ1 WE\ 32-Pin LCC (ECW) A9 A8 A7 NC Vcc A6 A5 4 3 2 1 31 32 30 A10 A11 A12 A13 A14 A15 A16 A17 CE\ 5 6 7 8 9 10 11 12 13 29 28 27 26 25 24 23 22 21 A2 A4 A3 A1 A0 NC NC NC DQ4 OPTIONS
● Timing 20ns access 25ns access 35ns access 45ns access 55ns access 70ns access MARKING -20 -25 -35 -45 -55* -70* 14 15 16 17 18 19 20 DQ3 DQ2 DQ1 WE\ Vss OE\ NC
● Package(s) Ceramic DIP (400 mil) C Ceramic Quad LCC (contact factory) ECW Ceramic LCC EC Ceramic Flatpack F Ceramic SOJ DCJ
● Operating Temperature Ranges Industrial (-40oC to +85oC) IT Military (-55oC to +125oC) XT
● 2V data retention/low power L No.
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