AX68002 Datasheet PDF

ASIX AX68002

The CPU architecture of AX6800x utilizes the USB protocols maintenance for those upstream and downstream ports to the external USB Host and Device and performs packet translation between upstream and downstream ports. The Root Hub provided all the transactions scheduling and management with CPU to maintain to the all adapted USB devices.

Part No.	AX68002
Datasheet	AX68002 Download
Manufacturer	ASIX
Description	2-Port USB KVM Switch SoC
Buy	Stock & Price

FEATURES

Single chip microcontroller with 2-port (AX68002) /4-Port (AX68004) USB KVM Switch CPU for Application 8-bit pipelined RISC, single cycle per instruction operating up to 96MHz and 100% software compatible with standard 8051/80390 Supports power management unit with deep sleep mode, programmable watchdog timer, three 16-bit timer/counters, and millisecond timer Supports CPU Debugger for connecting to In-Circuit Emulation (ICE) adaptor Supports DMA Controller (7 DMA channels) and memory arbiter for fast data movement during network protocol stack processing and peripheral communications 1 external interrupt sources with 2 priority levels Program/Data and Flash Memory On-chip 8KB SRAM for CPU program code mirroring Supports In-System Programming (ISP) for initial Flash memory programming via UART or ICE adaptor Supports reprogrammable boot code and In-Application Programming (IAP) to update boot code or run-time firmware through USB or UART interface On-chip 32KB data memory for...