AT17C128 Overview
The AT17C65/128/256 and AT17LV65/128/256 (low-density AT17 Series) FPGA configuration EEPROMs (Configurators) provide an easy-to-use, cost-effective configuration memory for Field Programmable Gate Arrays. The low-density AT17 Series is packaged in the 8-lead LAP, the 8-lead PDIP, the 8-lead SOIC and the popular 20-lead PLCC. The AT17 Series uses a simple serial-access procedure to configure one or more FPGA devices.
AT17C128 Key Features
- In-System Programmable (ISP) via 2-wire Bus
- Simple Interface to SRAM FPGAs
- patible with Atmel AT6000, AT40K and AT94K Devices, Altera FLEX®, APEX™
- Cascadable Read-back to Support Additional Configurations or Higher-density Arrays
- Low-power CMOS EEPROM Process
- Programmable Reset Polarity
- Available in 6 mm x 6 mm x 1 mm 8-lead LAP (Pin-patible with 8-lead SOIC/VOIC Packages), 8-lead PDIP, 8-lead SOIC and 20
- Emulation of Atmel’s AT24CXXX Serial EEPROMs
- Available in 3.3V ± 10% LV and 5V ± 5% C Versions
- Low-power Standby Mode