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AT45DB321 - 32-Megabit 2.7-volt Only Serial DataFlash

General Description

tem reprogramming.

528 bytes each.

SRAM data buffers of 528 bytes each.

Key Features

  • Single 2.7V - 3.6V Supply.
  • Serial-interface Architecture.
  • Page Program Operation.
  • Single Cycle Reprogram (Erase and Program).
  • 8192 Pages (528 Bytes/Page) Main Memory.
  • Optional Page and Block Erase Operations.
  • Two 528-byte SRAM Data Buffers.
  • Allows Receiving of Data while Reprogramming of Nonvolatile Memory.
  • Internal Program and Control Timer.
  • Fast Page Program Time.
  • 7 ms Typical.
  • 120 µs T.

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Full PDF Text Transcription for AT45DB321 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for AT45DB321. For precise diagrams, and layout, please refer to the original PDF.

Features • Single 2.7V - 3.6V Supply • Serial-interface Architecture • Page Program Operation – Single Cycle Reprogram (Erase and Program) – 8192 Pages (528 Bytes/Page) M...

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le Cycle Reprogram (Erase and Program) – 8192 Pages (528 Bytes/Page) Main Memory • Optional Page and Block Erase Operations • Two 528-byte SRAM Data Buffers – Allows Receiving of Data while Reprogramming of Nonvolatile Memory • Internal Program and Control Timer • Fast Page Program Time – 7 ms Typical • 120 µs Typical Page to Buffer Transfer Time • Low-power Dissipation – 4 mA Active Read Current Typical – 3 µA CMOS Standby Current Typical • 13 MHz Max Clock Frequency • Hardware Data Protection Feature • Serial Peripheral Interface (SPI) Compatible – Modes 0 and 3 • CMOS and TTL Compatible Inputs and Outputs • Commercial a

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