Datasheet Summary
Features
- Single 2.7V
- 3.6V Supply
- Dual-interface Architecture
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- -
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- - Dedicated Serial Interface (SPI Modes 0 and 3 patible)
- Dedicated Parallel I/O Interface (Optional Use) Page Program Operation
- Single Cycle Reprogram (Erase and Program)
- 8192 Pages (1056 Bytes/Page) Main Memory Supports Page and Block Erase Operations Two 1056-byte SRAM Data Buffers
- Allows Receiving of Data while Reprogramming the Flash Array Continuous Read Capability through Entire Array
- Ideal for Code Shadowing Applications Low-power Dissipation
- 4 mA Active Read Current Typical
- 2 µA CMOS Standby Current Typical 20 MHz Maximum Clock Frequency
- Serial Interface 5 MHz Maximum Clock...
