Datasheet Summary
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Features
- 80C52X2 Core (6 Clocks per Instruction)
- Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode
- Dual Data Pointer
- Full-duplex Enhanced UART (EUART), TxD and Rxd are 5 Volt Tolerant
- Three 16-bit Timer/Counters: T0, T1 and T2
- 256 Bytes of Scratchpad RAM 8/16/32-Kbyte On-chip ROM 512 byte or 32-Kbyte EEPROM(1) On-chip Expanded RAM (ERAM): 1024 Bytes Integrated Power Monitor (POR/PFD) to Supervise Internal Power Supply USB 2.0 Full Speed pliant Module with Interrupt on Transfer pletion (12Mbps)
- Endpoint 0 for Control Transfers: 32-byte FIFO
- 6 Programmable Endpoints with In or Out Directions and with Bulk, Interrupt or Isochronous...