ATA5746 Datasheet | Atmel

Features - Transparent RF Receiver ICs for 315 MHz (ATA5746) and 433.92 MHz (ATA5745) With - - High Receiving Sensitivity Fully Integrated PLL With Low Phase Noise VCO, PLL, and Loop Filter High FSK/ASK Sensitivity:- 105 d Bm (ATA5746, FSK, 9.6 Kbits/s, Manchester, BER 10-3) - 114 d Bm (ATA5746, ASK, 2.4 Kbits/s, Manchester, BER 10-3) - 104 d Bm (ATA5745, FSK, 9.6 Kbits/s, Manchester, BER 10-3) - 113 d Bm (ATA5745, ASK, 2.4 Kbits/s, Manchester, BER 10-3) Supply Current: 6.5 m A in Active Mode (3V, 25°C, ASK Mode) Data Rate: 1 Kbit/s to 10 Kbits/s Manchester ASK, 1 Kbit/s to 20 Kbits/s Manchester FSK With Four Programmable Bit Rate Ranges Switching Between Modulation Types ASK/FSK and Different Data Rates Possible in ≤1 ms Typically, Without Hardware Modification on Board to Allow Different Modulation Schemes for RKE, TPMS Low Standby Current: 50 µA at 3V, 25°C ASK/FSK Receiver Uses a Low-IF Architecture With High Selectivity, Blocking, and Low Intermodulation (Typical 3-d B Blocking 68.0 d BC at ±3 MHz/74.0 d BC at ±20.0 MHz, System I1d BCP = - 31 d Bm/System IIP3 = - 24 d Bm) Telegram Pause Up to 52 ms Supported in ASK Mode Wide Bandwidth AGC to Handle Large Out-of-band Blockers above the System I1d BCP 440-k Hz IF Frequency With 30-d B Image Rejection and 420-k Hz IF Bandwidth to Support PLL Transmitters With Standard Crystals or SAW-based Transmitters RSSI (Received Signal Strength Indicator) With Output Signal Dynamic Range of 65 d B Low In-band Sensitivity Change of Typically ±2.0 d B Within ±160-k Hz Center Frequency Change in the plete Temperature and Supply Voltage Range .. Sophisticated Threshold Control and Quasi-peak Detector Circuit in the Data Slicer Fast and Stable XTO Start-up Circuit (> - 1.4 kΩ Worst-case Start Impedance) Clock Generation for Microcontroller ESD Protection at all Pins (±4 k V HBM, ±200V MM, ±500V FCDM) Dual Supply Voltage Range: 2.7V to 3.3V or 4.5V to 5.5V Temperature Range: - 40°C to +105°C Small 5 mm × 5 mm QFN24 Package - - - UHF ASK/FSK Receiver...