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ATC18RHA - Rad. Hard 0.18 Um CMOS Cell-based ASIC for Space Use

General Description

The Atmel ATC18RHA is fabricated on a proprietary 0.18 µm, up to six-layer-metal CMOS process intended for use with a supply voltage of 1.8V ± 0.15V.

Table 1 shows the range for that Atmel library cells have been characterized.

Table 1.

Key Features

  • Comprehensive Library of Standard Logic and I/O Cells.
  • ATC18RHA Core and I/O Cells Designed to Operate with VDD = 1.8V Sparing 0.15V as Main Target Operating Conditions IO33 Pad Libraries Provide Interfaces to 3V Environments Memory Cells Compiled to the Precise Requirements of the Design EDAC Library SEU Hardened DFF’s Cold Sparring Buffers High Speed LVDS Buffers PCI Buffers Predefined Die Sizes to Accommodate Specified Packages and ESA (European Space Agency) Multi-project.

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Other Datasheets by Atmel (now Microchip Technology)

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ATC18 Embedded ASIC Memory Cell
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Features • Comprehensive Library of Standard Logic and I/O Cells • ATC18RHA Core and I/O Cells Designed to Operate with VDD = 1.8V Sparing 0.15V as Main Target Operating Conditions IO33 Pad Libraries Provide Interfaces to 3V Environments Memory Cells Compiled to the Precise Requirements of the Design EDAC Library SEU Hardened DFF’s Cold Sparring Buffers High Speed LVDS Buffers PCI Buffers Predefined Die Sizes to Accommodate Specified Packages and ESA (European Space Agency) Multi-project Wafer Services • MQFP Package Up to 352 Pins (340 Signal Pins) • MCGA Packages Up to 625 Pins (581 Signal Pins) • Assurance Programs Will Allow – Testing Flight Models to SCC B and QML Q & V – Monitoring Heavy Ions Latch-up Immunity and Total Dose Capability Better than 100 Krads. • • • • • • • • Rad.