TS68882 Overview
The TS68882 enhanced floating-point co-processor is a full implementation of the IEEE Standard for Binary Floating-Point Arithmetic (754) for use with the THOMSON TS68000 Family of microprocessors. It is a pin and software patible upgrade of the TS68881 with optimized MPU interface that provides over 1.5 times the performance of the TS68881. It is implemented using VLSI technology to give systems designers the...
TS68882 Key Features
- Eight General-purpose Floating-point Data Registers, Each Supporting a Full 80-bit
- MIL-STD-883