TS68EN360 Overview
The TS68EN360 QUad Integrated munication Controller (QUICC™) is a versatile one-chip integrated microprocessor and peripheral bination that can be used in a variety of controller applications. It particularly excels in munications activities. The QUICC (pronounced “quick”) can be described as a next-generation TS68302 with higher performance in all areas of device operation, increased flexibility, major extensions...
TS68EN360 Key Features
- CPU32+ Processor (4.5 MIPS at 25 MHz)
- 32-bit Version of the CPU32 Core (Fully patible with the CPU32)
- Background Debug Mode
- Byte-misaligned Addressing Up to 32-bit Data Bus (Dynamic Bus Sizing for 8 and 16 Bits) Up to 32 Address Lines (At Least
- 25 MHz Operation) Slave Mode to Disable CPU32+ (Allows Use with External Processors)
- Multiple QUICCs Can Share One System Bus (One Master)
- TS68040 panion Mode Allows QUICC to be a TS68040 panion Chip and Intelligent Peripheral (22 MIPS at 25 MHz)
- Peripheral Device of TSPC603e (see DC415/D note) Four General-purpose Timers
- Superset of MC68302 Timers
- Four 16-bit Timers or Two 32-bit Timers