TS80C52X2 Description
TS80C52X2 is high performance CMOS ROM, OTP, EPROM and ROMless versions of the 80C51 CMOS single chip 8-bit microcontroller. The TS80C52X2 retains all.
TS80C52X2 Key Features
- 80C52 patible
- 8051 Pin and Instruction patible
- Four 8-bit I/O Ports
- Three 16-bit Timer/Counters
- 256 Bytes Scratchpad RAM High-speed Architecture 40 MHz at 5V, 30 MHz at 3V X2 Speed Improvement Capability (6 Clocks/Ma
- 6 Interrupt Sources
- 4 Level Priority Interrupt System Full Duplex Enhanced UART
- Framing Error Detection
- Automatic Address Recognition Low EMI (Inhibit ALE) Power Control Modes
- Idle Mode